Achronix Speedster22i User Macro Guide Bedienungsanleitung Seite 176

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Seitenansicht 175
Memories LRAM640
Speedster22i Macro Cell Library
AchronixSemiconductorProprietary PAGE 159
Simultaneous Memory Operations
Memory operations may be performed simultaneously from both sides of the memory,
howeverthereisa restrictionwithmemory collisions.Amemorycollision isdefined asthe
condition where both of the ports access the same memory address within the same clock
cycle (both ports connected to the same clock), or
within a TBD ps window (if each port is
connectedtoadifferentclock).Thedefinitionofa memorycollision dependsonwhetheror
nottheReadPortOutputRegisterisenabled.
If the Read Port Output Register in not enabled (reg_dout = 1’b0), a memory collision is
defined by reading the same address the cycle after a write command has occurred.If the
Read Port Output Reigister is enabled (reg_dout = 1’b1), a memory collision is defined by
reading the same address
two cycle after a write command has occurred.If a memory
collisionoccurs,thewritetothememoryisvalid,butthereaddatamaybeincorrect.
LRAM640 Memory Initialization
Bydefault,thecontentsoftheLRAM640memoryareundefined.Iftheuserwantstheinitial
contentstobedefined,hemayassignthemfromeitherafilepointedtobythemem_init_file
parameterorassignthemfromthevalueofthemem_initparameter.
Thememoryisorganizedaslittleendianwithbit0mappedtobitzeroofparametermem_init
andbit639mappedtobit639ofparametermem_init.
TheLRAM640 memory block may alternativelybe initialized with a memoryfileby setting
the mem_init_file to point to the path of a memory initialization file. The file format in the
lattercaseisdefinedbyhexadecimalentriesseparatedbywhitespace,wherethe whitespace
is def ine d by spaces or
line separation. Each number is written as an 8bit hexadecimal
number.Commentingisallowedfollowingadoubleslash(//)throughtotheendoftheline.
Clikecommentingisalsoallowedwherethecharactersbetweenthe/*and*/areignored.The
memory is initialized starting with the
first entry of the file initia lizing the memory array
starting with address zero, moving upward. Each line consists as the number itself
representedasahexadecimalnumber.
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